Timeline: Feb 2009 - Feb 2010
Thesis Report: PDF
This project addresses the high energy consumption problem in embedded multiprocessor systems with caches. Snoopy based cache coherence protocols are widely used in these systems and these protocols inherently cause heavy coherence traffic and unnecessary snoop induced data cache tag lookups causing considerable amount of energy consumption. Snoop filters have proved to be an effective method in reducing these unnecessary tag lookups for high performance servers. In this project, we evaluate the performance and energy consumption of snoop filters for embedded systems.
Timeline : April - August 2009
Most modern processors have Memory Management Unit Hardware built into the processor whose main functions are virtual address translation, memory protection and cache control. With RTEMS primarily focused on Embedded Real Time applications, making use of these MMU features especially Memory Protection is important to meet the needs of those applications that requires such support. RTEMS currently does not have MMU support and this project proposes to add this as part of the GSoC Programme.
More information on the project at http://code.google.com/p/rtems-mmu-support
The biggest threat to the burgeoning automobile industry is the depletion of fuel resources. With most manufacturer’s claiming a top speed 50MPH for their alternate fuel vehicles, we are not yet ready to make the transition into vehicles that completely run on alternate fuels. Our project, a Hybrid Electric Vehicle, is an intermediate step in the transition between fossil fuel powered vehicles and alternate fuel powered vehicles.
There are basically two types of hybrid drive systems. Parallel drive and series drive. In a series drive system the motor will run the vehicle and the engine will merely charge the batteries. In a parallel drive system however, both the motor and the engine will accelerate. The system we have developed is a parallel drive system. During acceleration of the vehicle only the motor will pull the vehicle and during constant speed running only the engine will pull the vehicle. The engine is efficient for only a narrow speed range. The motor on the other hand is more efficient under changing load. Therefore by using the motor for changing loads, the engine for constant load and Embedded System monitoring the process, we have developed an efficient system.
GNUSim8085 is a free (available free) (open source) as well as award-winning*, graphical CPU simulator with built-in assembler and debugger for the Intel 8085 microprocessor for Microsoft Windows and GNU / Linux platforms. The program is distributed under the GNU GPL license. It was started by Sridhar Ratnakumar when he was a student and is now currently maintained/developed by Onkarshinde and myself.
*FOSS India Award List
Timeline : 2004-2005
Document : PDF
The visually impaired have been deprived of a normal living style due to the absence of proper aiding devices. This projects aims to fill up the gap, which deprived the visually impaired from leading a normal life and the way they gain access to information. This system involves the design of various modules, which aim to ease the way of living of a visually impaired person and how he can blend with the normal kind of living.
The objective of this project is to design a Microcontroller based trainer kit with provisions for Port Access, Serial and Parallel Interfacing with the PC. An onboard ADC is also provided.
Feature fusion presents a kind of feature integration wherein two stimuli that are spatially and temporally separated can be collapsed into a single percept. Using transcranial magnetic stimulation, we investigate the effect of disrupting this feature integration on the performance of individuals at certain perceptual tasks.
Timeline: Feb 2009-Jun 2009
Document: A Brief Report
This was part of a Multichannel Data Acquisition Integrated Chip project with the vision of capturing analog signals and storing this data digitally. I was part of the semi-custom team whose goal was to design the digital blocks of the chip. These blocks were responsible in capturing the data received from the 16 ADC channels and generate a frequency representation of the signals using Fast Fourier Transform (FFT). Incoming data was temporarily stored in dual port memory modules. FFT was performed on this data and the output streamed to a peripheral interface.